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通过积层设计实现高电容
通过优化的端子材料实
现低ESR
主要数据
类型 温度特点 额定电压
[V] 电容
[F] 积层元件 尺
寸
[mm]
CAA572C0G3A203J* C0G 1000 20n 2
2x stack:6.1 x 5.6 x 6.4
3x stack:6.1 x 8.4 x 6.4
CAA572C0G3A303J*
30n 2
CAA572C0G3A443J* 44n 2
CAA572C0G3A663J*
66n 2
CAA573C0G3A993J* 99n 3
CAA572C0G2J204J*
630 200n 2
CAA573C0G2J304J* 300n 3
CAA572X7T2J105M**
X7T 630 1μ 2 2x stack:6.1 x 5.0 x 6.4
3x stack:6.1 x 7.5 x 6.4
CAA573X7T2J155M**
1.5μ 3
CAA572X7T2W225M** 450 2.2μ 2
CAA573X7T2W335M**
3.3μ 3
CAA572X7S2A336M** X7S 100 33μ 2
CAA573X7S2A476M**
47μ 3
CAA572X7R1V107M**
X7R 35 100μ 2 2x stack:6.4 x 5.0 x 6.8
3x stack:6.4 x 7.5 x 6.8
CAA573X7R1V157M**
150μ 3
CAA572X7R1E107M** 25 100μ 2
CAA573X7R1E157M** 150μ 3
